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| IMP5226 1 DATA COMMUNICATIONS 18-Line Plug and Play SCSI Terminator The 18-channel IMP5226 SCSI terminator is part of IMP's family of highperformance SCSI terminators that deliver true UltraSCSI performance. The BiCMOS design offers superior performance over first generation linear regulator/resistor based terminators. IMP's new architecture employs high-speed adaptive elements for each channel, thereby providing the fastest response possible - typically 35MHz, which is 100 times faster than the older linear regulator terminator approach. The bandwidth of terminators based on the older regulator/resistor terminator architecture is limited to 500kHz since a large output stabilization capacitor is required. The IMP architecture eliminates the external output compensation capacitor and the need for transient output capacitors while maintaining pin compatibility with first generation designs. Reduced component count is inherent with the IMP5226. The IMP5226 architecture tolerates marginal system designs. A key improvement offered by the IMP5226 lies in its ability to insure reliable, error-free communications even in systems which do not adhere to recommended SCSI hardware design guidelines, such as improper cable lengths and impedance. Frequently, this situation is not controlled by the peripheral or host designer. The IMP5226 can be placed in a sleep mode with a high logic signal. In the sleep mode the outputs are in a high impedance state. Quiescent current is less than 150A when disabled. The IMP5226 is a superior pin-for-pin replacement for the LX5226, LX5207, UC5601/5602 and the UCC5610. Key Features x Ultra-Fast response for Fast-20 SCSI x 35MHz channel bandwidth x Sleep-mode current less than 150A -- Disconnects terminator from lows x NO external compensation capacitors x Compatible with active negation drivers x Compatible with passive and active terminations x Approved for use with SCSI 1, 2, 3 and Ultra SCSI x Hot-swap compatible x Pin-for-pin compatible with LX5226, LX5207 and UCC5610 IMP SCSI Terminators Part IMP5111 IMP5112 IMP5115 IMP5121 IMP5218 IMP5219 IMP5225 IMP5226 IMP5241 IMP5242 Channels 9 9 9 27 9 9 18 18 8 8 Type SE SE SE SE SE SE SE SE SE/LVD SE/LVD 5226_t06.eps Block Diagrams Term Power Thermal Limiting Circuit VTERM Current Biasing Circuit 24mA Current Limiting Circuit DATA OUTPUT PIN DB (0) 2.85V DISCONNECT - 1 of 18 Channels + 1.4V 5226_01.eps IMP5226 1 Pin Configuration SOWB-28 DISCONNECT T1 T2 T3 T4 T5 HEAT SINK / GND GND HEAT SINK / GND 1 2 3 4 5 6 7 8 9 IMP5226 28 GND 27 T18 26 T17 25 T16 24 T15 23 T14 22 HEAT SINK / GND 21 HEAT SINK / GND 20 HEAT SINK / GND 19 T13 18 T12 17 T11 16 T10 15 NC 5226_02a.eps SSOP-28 DISCONNECT T1 T2 T3 T4 T5 HEAT SINK / GND GND HEAT SINK / GND 1 2 3 4 5 6 7 8 9 IMP5226 28 GND 27 T18 26 T17 25 T16 24 T15 23 T14 22 HEAT SINK / GND 21 HEAT SINK / GND 20 HEAT SINK / GND 19 T13 18 T12 17 T11 16 T10 15 NC 5226_02b.eps T6 10 T7 11 T8 12 T9 13 VTERM 14 DWP Package T6 10 T7 11 T8 12 T9 13 VTERM 14 DB Package Ordering Information Part Number IMP5226CDWP IMP5226CDWPT IMP5226CDB IMP5226CDBT Temperature Range 0C to 70C 0C to 70C 0C to 70C 0C to 70C Package 28-pin Plastic SOWB Tape and Reel, 28-pin Plastic SOWB 28-pin Plastic SSOP Tape and Reel, 28-pin Plastic SSOP 5226_t01.at3 Absolute Maximum Ratings1 TermPwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . +7V Signal Line Voltage . . . . . . . . . . . . . . . . . . . . . 0V to +7V Operating Junction Temperature . . . . . . . . . . 150C Storage Temperature Range . . . . . . . . . . . . . . -65C to 150C Lead Temperature (Soldering, 10 sec.) . . . . . . 300C Note: 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Thermal Data DWP Package Thermal Resistance Junction-to-Leads, JL . . . . . . . . 18C/W Thermal Resistance Junction-to-Ambient, JA . . . . . . 40C/W DB Package Thermal Resistance Junction-to-Ambient, JA . . . . . . 117C/W Junction Temperature Calculation: TJ = TA + (PD x JA). The JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the ambient airflow is assumed. 2 408-432-9100/www.impweb.com (c) 2000 IMP, Inc. IMP5226 1 Recommended Operating Conditions Parameter Termpwr Voltage Signal Line Voltage Disconnect Input Voltage Operating Junction Temperature Range - IMP5226C Symbol VTERM Min 4.0 0 0 0 Typ Max 5.5 5.0 VTERM 125 Units V V V C 5226_t02.eps Note: 2. Recommended operating conditions indicate the range over which the device is functional. Electrical Characteristics Unless otherwise specified, these specifications apply at an ambient operating temperature of TA = 25C. TermPwr = 4.75V. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature. Parameter Output High Voltage TermPwr Supply Current Symbol Conditions VOUT ICC All data lines = Open All data lines = 0.2V DISCONNECT Pins > 2.0V Min 2.65 Typ 2.85 10 424 50 Max 15 450 150 -24 -10 1 Units V mA A mA A A MHz mA 5226_t03.eps Output Current Disconnect Input Current Output Leakage Current Channel Bandwidth Termination Sink Current, per Channel IOUT IIN IOL BW ISINK VOUT = 0.5V DISCONNECT Pins = 0V DISCONNECT Pins > 2.0V, VO = 0.2V -20 -22 35 VOUT = 4V 7 (c) 2000 IMP, Inc. Data Communications 3 IMP5226 1 Application Information Figure 1. Receiving Waveform - 20MHz Figure 2. Driving Waveform - 20MHz Receiver 1 Meter, AWG 28 DISCONNECT IMP5226 Driver IMP5226 DISCONNECT 5226_03.eps Figure 3. 4 408-432-9100/www.impweb.com (c) 2000 IMP, Inc. IMP5226 1 Application Information Cable transmission theory suggests to optimize signal speed and quality, the termination should act both as an ideal voltage reference when the line is released (deasserted) and as an ideal current source when the line is active (asserted). Common active terminators which consist of linear regulators in series with resistors (typically 110) are a compromise. With coventional linear terminators as the line voltage increases the amount of current decreases linearly by the equation; Acting as a near ideal line terminator, the IMP5226 closely reproduces the optimum case when the device is enabled. To enable the device the disconnect pin is pulled LOW. During this mode of operation, quiescent current is 10mA, and the device will respond to line demands by delivering 24mA on assertion and by imposing 2.85V on deassertion. In order to disable the device, the disconnect pin must be driven HIGH In the disable mode, the device is in a sleep state with quiescent current less than 150A. When disabled, all outputs are in a high impedance state. Sleep mode can be used for power conservation or to remove the terminator from the SCSI chain. An additional feature of the IMP5226 is its compatibility with active negation drivers. (VREF - VLINE) = I. R The IMP5226, with its unique new architecture, applies the maximum amount of current regardless of line voltage until the termination high threshold (2.85V) is reached. Table 1. Power Up/ Power Down Function Table DISCONNECT L H Open Outputs Enabled HI Z HI Z Maximum Quiescent Current 15mA 150A 150A 5226_t04.eps (c) 2000 IMP, Inc. Data Communications 5 IMP5226 1 Package Dimensions SOWB (28-Pin) A Inches Min A B C D F G J K M P Millimeters Max Min Max SOWB (28-Pin)* 28 15 B 1 14 P F G D L C M SEATING PLANE K J 28-Pin (SOWB)DWP.eps 0.698 0.713 0.291 0.299 0.093 0.104 0.013 0.018 0.016 0.050 0.050 BSC 0.009 0.013 0.004 0.012 0 8 0.394 0.419 17.70 18.10 7.40 7.60 2.35 2.65 0.33 0.51 0.40 1.27 1.27 BSC 0.23 0.32 0.10 0.30 0 8 10.00 10.65 1.73 1.99 0.25 0.38 0.13 0.22 10.07 10.33 5.20 5.38 0.65 BSC 0.05 0.21 1.63 1.83 0.65 0.95 0 8 7.65 7.90 5226_t05.at3 SSOP (28-Pin) SSOP (28-Pin) EP 123 D F AH E A 0.068 0.078 B 0.009 0.015 C 0.005 0.008 D 0.396 0.407 F 0.205 0.212 G 0.25 BSC J 0.002 0.008 K 0.064 0.072 L 0.025 0.037 M 0 8 P 0.301 0.311 * JEDEC Drawing MO-013AE C M SEATING PLANE B G L 28-Pin (SSOP)DB.eps IMP, Inc. Corporate Headquarters 2830 N. First Street San Jose, CA 95134-2071 Tel: 408-432-9100 Fax: 408-432-1085 e-mail: info@impinc.com http://www.impweb.com The IMP logo is a registered trademark of IMP, Inc. All other company and product names are trademarks of their respective owners. (c) 2000 IMP, Inc. Printed in USA Publication #: 7009 Revision: D Issue Date: 08/19/02 Type: Preliminary |
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